Linux Kernel Porting Workshop, Report

The "Linux Kernel Porting Workshop", was organized on Sep 10 and 11. About 36 people from various organizations, including CEM Solutions (Bengaluru), EmbDes (Bengaluru) e-con Systems, Logitech, NIELIT (Calicut), Visteon, VVDN Technologies, attended the workshop.

The Training Team

The training team consisted of Babu, Deepak, Joses Paul, Raashid, Raman and Vijay Kumar (in alphabetical order).

Workshop Setup

People started arriving at 8:30 AM, and got their systems setup with the workshop disk images. For most of the people, the setup was done without much hassles, and for those who had troubles our engineers stepped-in and helped them resolve the issues. By 10:00 AM most people had arrived and had their laptops configured with the disk images.

Day 1, Forenoon: Level the Playing Field

Given the fact that the workshop had people from various different backgrounds, a review of the fundamentals of device interfacing, drivers, kernel modules, kernel compilation, and module programming was provided first. This helped people who had been on-and-off with kernel programming to come upto speed for the workshop. An overview of Qemu and its networking modes was also provided, since it was used for emulating the target machine.

Day 1, Afternoon: Bus Model and DTS Introduction

The bus model has become the central to the way drivers discover their devices and start handling them. And hence a strong foundation was provided on the bus model and module autoloading by Vijay. The description of the Device Tree Source representation was split into two parts - syntax and device description. And the syntax part was alone covered first. This helped people familiarize themselves with the nuances of the format, like the notation to represent values of properties, automatic merging of trees, and phandle notation.

Day 2, Forenoon: DTS Machine Description

With the syntax out of the way, Vijay started to build a device tree from scratch for the Gumstix Verdex Board. Starting from a device tree with just the memory node, and then gradually adding the peripherals like the UART, Timer, Interrupt Controller, and Clock Controller. Along the way, interrupt specifiers and clock specifiers were also added to the peripherals. With the basic peripherals in the device tree, the device tree was in a bootable state. This minimal DTS was then used to boot the kernel. Vijay then showed, how the DTS can be split into multiple includable files, so that nodes can be shared across machines using the same SoC. This layered approach was then used for building the minimal DTS.

With the basic on-chip peripheral description in place, Vijay then next moved on to showing how I2C devices can be added. This was followed by a background on Flash and MTD, and their DTS representation, by Deepak. Deepak then described the Ethernet interface, and its DTS representation.

Day 2, Afternoon: DTS Boot and Debugging

The DTS representation for LCD panels, GPIOs, and pin configuration were discussed. For the pin configuration a pin mux visualization tool that we had developed, helped people "see" the change in the pin mux configuration. The usage of device trees in drivers, device tree boot sequence, deferred probe were covered by Deepak. Techniques for debugging device tree issues, were discussed next. Deepak covered various kernel features available for debugging: the log buffer, dumping log buffer from U-Boot, enabling debug prints, etc.


Many in the audience appreciated the overall structuring and flow of the workshop. Here are a few quotes from the comments posted to the Explara and Zilogic’s event page.


We would like to thank all the participants and participating organizations, for all the enthusiasm. We will be returning back with more meticulously handcrafted workshops. Stay tuned, you can sign-up on our enquiry page, to get notifications about upcoming workshops.